Communication bugs are usually not mysterious. They are usually configuration mistakes, level mismatches, timing errors, termination problems, or bad assumptions about who owns the bus.

Before posting, work through this checklist:

• Confirm voltage levels, pull-ups, termination, and pin muxing
• Capture the line with a scope or logic analyzer
• Verify clock polarity, phase, bit order, and frame length
• Check reset sequencing and power-good timing on the peripheral
• Reduce the link speed before changing driver logic
• Test with a known-good cable, node, or adapter

Include captures, decoded frames, and a short description of the expected transaction. Raw code without captures is rarely enough.